This project brief describes how to assemble an isolated half-bridge IGBT gate driver module built around the NCD57085DR2G. It features onboard current sensing…
This project brief describes how to assemble an isolated half-bridge IGBT gate driver module built around the NCD57085DR2G. It features onboard current sensing and overcurrent protection.
In this Tech Guide, learn how the Vishay ISO-AC-VSAO Reference Design enables accurate, isolated high-voltage AC…
In this Tech Guide, learn how the Vishay ISO-AC-VSAO Reference Design enables accurate, isolated high-voltage AC measurement. Watch now to get started!
The new version of FPGA AI Suite is designed to accelerate trained AI models into FPGAs
The new version of FPGA AI Suite is designed to accelerate trained AI models into FPGAs
Learn how SoC integration impacts SMT assembly yield, from fine-pitch BGA challenges and package warpage to reflow…
Learn how SoC integration impacts SMT assembly yield, from fine-pitch BGA challenges and package warpage to reflow profiling and inspection strategies.
HDLs are formal descriptions of behavior, making them software by definition. Modernizing these outdated tools is key to…
HDLs are formal descriptions of behavior, making them software by definition. Modernizing these outdated tools is key to making FPGA development more accessible and productive for all engineers.
Modern SoC Evaluation Boards demand high-performance design, SI/PI, and system validation. Faraday offers 3 flexible…
Modern SoC Evaluation Boards demand high-performance design, SI/PI, and system validation. Faraday offers 3 flexible service levels to meet these complexities.
Learn how to prevent costly assembly delays by synchronizing ECAD and MCAD workflows through continuous 3D validation.…
Learn how to prevent costly assembly delays by synchronizing ECAD and MCAD workflows through continuous 3D validation. This also stabilizes production and eliminates mid-cycle re-spins.
Advanced packaging is at a crossroads due to AI demand. Learn the four emerging paths—CoWoS, CoPoS, glass-core, and…
Advanced packaging is at a crossroads due to AI demand. Learn the four emerging paths—CoWoS, CoPoS, glass-core, and CoWoP—and how to choose the right one for your multi-die system design.
The Renesas 365 Development platform unifies electronics design from MCU recommendation to validation.
The Renesas 365 Development platform unifies electronics design from MCU recommendation to validation.
A new human-centered toolkit includes goal-driven autonomous agents within established verification environments.
A new human-centered toolkit includes goal-driven autonomous agents within established verification environments.
The shift to 3D ICs and chiplets demands automated, hierarchical design planning to manage exploding pin counts. Learn…
The shift to 3D ICs and chiplets demands automated, hierarchical design planning to manage exploding pin counts. Learn how Siemens EDA's Innovator3D IC addresses these challenges.
Announced today, the free cloud-based toolset replaces spreadsheets with graphical signal path design for automated test…
Announced today, the free cloud-based toolset replaces spreadsheets with graphical signal path design for automated test engineers.
The W3510E workflow targets pre-layout modeling, EM analysis, and early UCIe and BoW validation for advanced AI…
The W3510E workflow targets pre-layout modeling, EM analysis, and early UCIe and BoW validation for advanced AI infrastructure designs.
The device technology co-optimization (DTCO) methodology requires generating large numbers of layouts. This article…
The device technology co-optimization (DTCO) methodology requires generating large numbers of layouts. This article introduces a few ways of speeding up this time-consuming process using automation.
A cluster of early February deals pulled wireless MCUs, clocking IP, analog sensors, and AI-driven inspection software…
A cluster of early February deals pulled wireless MCUs, clocking IP, analog sensors, and AI-driven inspection software into larger platforms spanning IoT, automotive, industrial, and semiconductor manufacturing.
Same Sky Pogo Pins & PCB Pins offer a high-reliability interconnect solution featuring gold-plated contacts designed to…
Same Sky Pogo Pins & PCB Pins offer a high-reliability interconnect solution featuring gold-plated contacts designed to withstand up to 100,000 mating cycles. Watch and learn all about their features, specs, applications, and more!
Announced today, the new ChipStack AI Super Agent from Cadence automates front end silicon design and verification,…
Announced today, the new ChipStack AI Super Agent from Cadence automates front end silicon design and verification, delivering a 10X productivity increase.
The research program aims to improve heat-prediction accuracy at the nanoscale while reducing simulation time for…
The research program aims to improve heat-prediction accuracy at the nanoscale while reducing simulation time for advanced semiconductor design.
The new toolkit integrates with Keysight’s device modeling software to automate parameter extraction and shorten…
The new toolkit integrates with Keysight’s device modeling software to automate parameter extraction and shorten compact-model and PDK development cycles.
In this article, we'll walk through the steps of generating a Process Design Kit (PDK) for digital standard cell libraries.
In this article, we'll walk through the steps of generating a Process Design Kit (PDK) for digital standard cell libraries.
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