Cadence Unwraps Agentic AI Super Agent for Chip Design and Verification

Today, Cadence announced its new ChipStack AI Super Agent to automate front-end silicon design and verification. Cadence calls ChipStack a first to use agentic AI in the front-end silicon design industry. The agentic AI workflow delivers a 10X increase in productivity by automating the design and verification phase of silicon development.

Cadence already has more than 1,000 tapeout credits to date with its existing AI-enabled tools. The new ChipStack AI Super Agent draws on that extensive AI experience to create an AI driven workflow that combines the operation of Cadence tools Verisium Verification Platform, Cerebrus Intelligent Chip Explorer, and JedAI data and AI platform.

Cadence claims ChipStack as the first to use agentic AI in front-end silicon design.

It supports cloud-based and on-premises frontier models, including NVIDIA’s NeMo generative AI framework and the NVIDIA Llama Nemotron Reasoning Model. The ChipStack has integrations to all Cadence's EDA tools so it can operate both the AI add-ons and the traditional EDA tools.

ChipStack AI takes in specifications and high-level descriptions from a designer and utilizes it to autonomously create and verify chip designs. The AI generated work includes: coding designs and testbenches, creating test plans, orchestrating regression testing, debugging and automatically fixing issues.

High-Productivity AI—the Mental Model

Cadence drew upon its extensive history in the chip-design industry to develop agentic AI models that significantly decrease workload while improving quality of the delivered output.

ChipStack Mental Model approach

It is important to make a distinction between general knowledge public facing AI and targeted vertical AI, such as ChipStack. With vertically targeted AI, the provider (Cadence) is able to ensure that all of the input to the language models is vetted and “known good” ahead of time. This stands in stark contrast to general public-facing AI where much of the input is of completely unknown provenance and accuracy.

The ChipStack AI Super Agent relies on what Cadence calls a “Mental Model” to help the AI agents understand the intent of a chip designer. The model is designed to mimic the human process of reading specifications and manuals, and having conversations with people to form an internal model before design and verification.

The Mental Model is what allows ChipStack to utilize a general purpose LLM, like GPT-5, with Cadence data to produce output that avoids the problem of AI-hallucination. The LLM provides the logic and the Mental Model teaches it how to properly use EDA tools.

Kartik Hegde, Senior Director of Agentic AI and ChipStack at Cadence, described the mental model for us in our interview. “The mental model represents the design intent as the source of truth for the AI agent,” said Hedge. “It can consume information from PDF-based specification files, system Verilog code files, or behavioral models to create an internal representation that we store in a certain format that continues to evolve over time. This acts as the source of truth for agents to perform design or verification.”

“This is also a key way we solved the hallucination problem, where LLMs are known to blabber about things because they're statistical parrots. A mental model keeps them grounded—they have to refer to it to do certain things. So the Mental Model is at the core where we'll first understand the intent of the design and then perform downstream tasks.”

Declining Workforce in an Increasing Demand Industry

Much like the 1980s when the EDA industry emerged, chip complexity is exceeding the capabilities of existing tools and labor force. Cadence has been adding AI tools to its design suite and now, with ChipStack AI Super Agent, is bringing AI to front-end design and verification.

Paul Cunningham, senior vice president and general manager of Research and Development at Cadence put it this way: “Our customers are facing a significant deficit in the engineering talent needed to deliver on their product roadmaps. Our ChipStack AI Super Agent is a game changer for design and verification productivity, and deployments are ramping fast.”

End-to-end agentic AI verification powered by ChipStack AI Super Agent.

Integrated circuits of all flavors are rapidly increasing in complexity, with no end in sight. Even small microcontrollers and budget FPGAs now need to support advanced security algorithms and high-speed communications protocols. Larger monolithic chips have reached staggering levels of complexity and chiplets only give a slight respite due to inter chiplet communications requirements.

Cadence is estimating that chip complexity is expected to increase by 100X by the end of the decade with the industry growing by $1 Trillion in revenue. While this is happening, semiconductor companies are struggling to hire enough trained engineers in this challenging field. Semiconductors.org predicts a shortage of 270K engineers over the same period.

Cadence is offering ChipStack AI Super Agent as an automation tool that will allow companies to leverage experienced chip designers. By keeping the engineer in the loop, the AI tools can produce human-directed output. With the tool set, one designer will be able to do the work of many without compromising on performance and quality of the end product.

Proving itself in the Field

More than 10 top chip companies, including Altera and Nvidia, are already using the ChipStack AI Super Agent and proving its capabilities in the real-world. The system is now available to early access customers.

All images used courtesy of Cadence.