Technical Article

Adding Hysteresis to a Comparator Circuit: LTspice Lab

November 22, 2023 by Robert Keim

This article uses SPICE simulations to explain the functionality of hysteresis based on positive feedback in a comparator circuit.

In three preceding articles, we explored the theory and practice of hysteresis. Now, in the final article of this series, we’ll use LTspice to take a closer look at hysteresis in comparator circuits.

 

SPICE Test Bench for Comparator Hysteresis

In this section of the article, we’ll use the test setup in Figure 1 to run some simulations.

 

LTspice schematic of an open-loop comparator circuit for testing purposes.

Figure 1. LTspice comparator schematic.

 

I’m using the “diffschmtbuf” component as my comparator. The parameters I’ve specified for it in the SpiceLine field can be seen in Figure 2.

 

A screenshot of the SpiceLine field that shows the parameters for the diffschmtbuf component.

Figure 2. LTspice diffschmtbuf parameter definitions.

 

Let’s briefly look at each of the definitions:

  • vhigh = 5: the output will be 5 V when the non-inverting input (V+) is at a higher voltage than the inverting input (V-).
  • vlow = 0: the output will be 0 V when V+ is at a lower voltage than V-.
  • vt = 0: the threshold voltage is 0 V, meaning that the output will transition when the difference between the two input voltages is 0 V.
  • vh = 0: the comparator has 0 V of hysteresis. Making this value non-zero would definitely be an easier way to add hysteresis than what we’re about to do, but then we wouldn’t learn anything about hysteresis circuitry!

When examining Figure 1, you may have noticed a familiar shape inside the comparator symbol, which I’ve enlarged in Figure 3.

 

Close-up view of the comparator symbol in Figure 1's schematic. Inside the comparator symbol is a stylized representation of a hysteresis curve.

Figure 3. Schematic symbol for comparator with hysteresis.

 

That’s a simplified version of the typical hysteresis curve. Hysteresis plays such a prominent role in comparator applications that the hysteresis curve is sometimes included as part of the comparator’s schematic representation.

The input signal is created by connecting two voltage sources in series. The first, VRAMP, generates a signal that increases linearly from 0 V to 5 V in 10 ms. The second, VNOISE, is a sinusoid with an amplitude of 50 mV and a frequency of 10 kHz. Figure 4 shows the composite signal.

 

Combined input signal of a ramp and a small sinusoid, simulated in LTspice.

Figure 4. Combined input signal of a ramp and a small sinusoid.

 

Figure 5 provides a zoomed-in view.

 

Magnified view of the combined input signal from Figure 4, making the oscillations in the signal much more visible.

Figure 5. Magnified view of the combined input signal from Figure 4.

 

The inverting terminal (V-) is connected to a 2.5 V reference voltage (VREF). Since vt = 0, the threshold for output transition becomes VIN = V+ = 2.5 V. Figure 6 shows how the output behaves with the circuit in its original, non-hysteretic state.

 

Voltage plot of the comparator from Figure 1 with no hysteresis.

Figure 6. Voltage behavior of the circuit in Figure 1 without hysteresis.

 

That low-to-high transition looks a bit thick. Sure enough, if we zoom in (Figure 7) we see that the sinusoidal noise has caused multiple transitions.

 

Voltage plot of the comparator from Figure 1 with no hysteresis, magnified to clearly show unwanted transitions caused by noise.

Figure 7. A close-up view of the plot in Figure 6. Note the multiple transitions caused by noise.

 

Now that we’ve used the test bench to verify our design, it’s time to introduce the circuit we’ll look at for the rest of the article.

 

The Hysteresis Feedback Network

Hysteresis is one of the rare situations where we want positive feedback instead of negative feedback. Figure 8 shows a basic comparator circuit with hysteresis; note that its positive feedback configuration doesn’t modify the reference level. Rather, we’re using the current output voltage and the current input voltage to create a new signal. This signal is what we actually apply to the comparator’s non-inverting input terminal (V+).

 

An LTspice comparator that includes a hysteresis-causing voltage divider.

Figure 8. LTspice schematic of a comparator with positive-feedback-based hysteresis.

 

We know from the first article in this series that a fundamental principle of hysteresis is using the system’s history—or, more specifically, relative movement between input and output—to influence the system’s response to input conditions. It makes sense, then, that we’re feeding back information from the output, because the current state of the output indicates something about previous input activity.

If the output is currently at the positive rail, it means that the input was previously above the reference level. For the input to cross the reference level, it has to be decreasing. Conversely, if the output is currently at the negative rail, the input must previously have been below the reference level, and must be increasing if it crosses the reference level.

Figure 9 shows what happens when the input is increasing from 0 V, with the output starting at the negative rail. The vertical jump in the non-inverting voltage signal identifies the moment when the output transitions.

 

Input voltage, reference voltage, and voltage at the non-inverting terminal for a simulated comparator with positive feedback. The input signal is increasing.

Figure 9. VIN, V+, and VREF for a comparator with hysteresis. The output starts at the negative rail.

 

With the output at 0 V, R1 and R2 form a voltage divider, the output of which is applied to the non-inverting input terminal (V+). Due to this divider effect, V+ is lower than VIN and increases at a slower rate. The result is a widening discrepancy between the values of V+ and VIN.

The decrease of V+ relative to the input signal means that it takes longer for V+ to reach the reference level (VREF). In that sense, the comparator acts as though the reference level is now higher, even though VREF has actually remained unchanged.

When V+ reaches the reference level (VREF), the output transitions. Note that this occurs after VIN reaches the reference level—more hysteresis means more resistance to noise, but it also causes more transition delay.

In Figure 10, the input ramp reverses direction at 10 ms. The signal is now decreasing, and the output begins at the positive rail. As in the above example, in which the circuit’s output began at the negative rail and increased, this creates a delay. However, the voltage effect is reversed: V+ is now higher than VIN until the output switches.

 

Input voltage, reference voltage, and voltage at the non-inverting terminal for a simulated comparator with positive feedback. The input signal is initially increasing, but then peaks and begins to decrease.

Figure 10. VIN, V+, and VREF for a comparator with hysteresis demonstrating the different threshold voltages.

 

Creating Separate Thresholds

An output voltage at the positive rail produces a V+ that’s lower than VIN, while an output voltage at the negative rail produces a V+ that’s higher than VIN. In both cases, however, the input signal must go beyond the reference level in order to cause an output transition.

The result of all this is a system where increasing input signals have one threshold level and decreasing input signals have another. An increasing signal must go above the high threshold voltage (VTH); a decreasing signal must go below the low threshold voltage (VTL). The difference between VTH and VTL is equal to the amount of hysteresis, which is labeled as VHYST in Figure 11. The space between VTH and VTL is known as the hysteresis zone.

 

Diagram showing the zone between the low threshold voltage and high threshold voltage in a comparator with hysteresis.

Figure 11. The hysteresis zone.

 

After an output transition, signal fluctuations must reach the other threshold to cause a new transition. In this way, the hysteresis zone confers resistance to noise.

Imagine that a noisy input signal is increasing. Eventually it will cross VTH, and the output will transition to the positive rail. Shortly thereafter, the noise causes the signal to drop below VTH. Nothing happens in response to this, because the signal is now decreasing and has to drop all the way to VTL to cause a transition.

The resistance to noise achieved through hysteresis is evident in Figures 12, 13, and 14. The horizontal dotted lines represent VTL and VTH.

 

Simulated operation of a comparator with hysteresis and a noisy signal.

Figure 12. Operation of a comparator with hysteresis in the presence of a noisy input signal.

 

In Figure 13, the output switches at the high threshold voltage (VTH). If the circuit didn’t include hysteresis, the output would switch multiple times at the threshold due to the input sinusoid.

 

Magnified view of the plot in Figure 12, showing the output voltage switching at the high threshold voltage.

Figure 13. Magnified view of the switching at VTH, the high threshold voltage.

 

In Figure 14, the output switches at the low threshold voltage (VTL).

 

Magnified view of the plot in Figure 12, showing the output voltage switching at the low threshold voltage.

Figure 14. Magnified view of the switching at VTL, the low threshold voltage.

 

If you’d like design assistance or additional information on the mathematical relationships that influence the magnitude of VTL and VTH, I recommend taking a look at the Comparator with Hysteresis calculator on the All About Circuits website.

 

Wrapping Up

This concludes my four-article series on hysteresis. Over the course of this series, we’ve moved from the general (defining hysteresis as a theoretical concept) to the specific (how a positive feedback network turns a basic comparator into a hysteretic comparator). I hope that this has helped you to develop a strong understanding of what hysteresis is, how it works, and how it’s applied.

 

Background of featured image used courtesy of Adobe Stock; all other images used courtesy of Robert Keim

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