TSMC to Make 3nm Semiconductors at Arizona Fab

The Taiwan Semiconductor Manufacturing Company (TSMC) has announced plans to scale down its process node technology even further. TSMC will reportedly manufacture 3nm chips at its Arizona chip fab. Some reports even indicate that TSMC has plans for 1nm chip production, too. 

 

The Status of Node Scaling in the Industry

The 3nm process is the next die size below the 5nm technology node, and several big industry players are vying to mass-produce it first. Smaller nodes allow more transistors to be placed on a given area, boosting power efficiency.

TSMC's first-generation 3nm chips will reduce power consumption by almost half while vastly improving performance.

 

TSMC logo as seen at its headquarters in Hsinchu, Taiwan, in 2018. Image used courtesy Reuters/Tyrone Siu via Flickr

 

Over the past decades, chipmakers have tried to squeeze more transistors onto ever smaller surfaces; however, chip scaling has nearly reached its limit. To extend Moore's law, engineers have looked at other 2D materials to replace silicon and push chips to 1nm and lower. 

 

Samsung First to Mass Produce 3nm Semiconductors

South Korean tech giant Samsung Electronics began mass-producing 3nm chips in June at its Hwaseong and Pyeongtaek semiconductor facilities—the first to do so globally.

The company aims to invest $132 billion in its logic chip and foundry business by 2030 and has plans to build a semiconductor plant in Texas. The company is currently producing the first generation of 3nm chips and plans to start producing the second generation of 3nm process in 2023. 

As the world’s largest foundry, TSMC is hot on Samsung’s heels, with plans to produce 3nm chips at its Arizona factory and erect a second factory. TSMC's expansion plan is part of the Biden administration’s strategy to bolster U.S. chipmaking. The company stated in April that it plans to invest $100 billion to expand its chip fabrication capacity over the next three years, with the production of 2nm chips planned by 2025.

Meanwhile, in April 2022, Intel announced plans for its manufacturing processes, moving from Intel 7 to Intel 18A; each step offers improved performance relative to power consumption. While Intel is currently behind TSMC and Samsung, it hopes to catch up and surpass them by 2025. 

 

TSMC 3nm Has a Leg Up: FinFlex Technology

TSMC describes its 3nm technology, named N3, as a full node stride from its existing 5nm offering. The N3 chip employs the FinFlex technology, allowing engineers to mix and match different kinds of standard cells within one block to optimize performance, power consumption, and area (PPA).

 

Diagram showing the evolution of TSMC’s dedicated foundry process technologies. Image used courtesy of TSMC. (Click image to enlarge)

 

FinFlex technology is particularly beneficial in complex designs that feature a lot of cores, such as CPUs and GPUs. Compared to 5nm, TSMC claims the new technology node will offer up to 70% logic density gain, 15% speed improvement at the same power, and 30% power reduction at the same speed.

TSMC hopes the N3 will represent the most advanced foundry technology in both PPA and transistor technology. The N3 technology will also offer complete platform support for mobile and HPC applications.

 

TSMC's Plans to Scale Down to 3nm in Arizona

TSMC is constructing a $12 billion plant in Arizona. In the new plant's first phase in 2024, TSMC will produce 5nm chips. The company has stated that it plans to initially produce around 20,000 chips per month using the 5nm process. The next phase, yet to be finalized, will produce the 3nm chips. 

While the cost of constructing the plant has been higher than expected due to labor costs and pandemic-related supply chain issues, it remains on track to meet the demands of TSMC customers in the region. 

 

Progress on 1nm Chip Production 

TSMC recently teamed up with the National Taiwan University (NTU) and the Massachusetts Institute of Technology (MIT) to forge ahead in developing 1nm chips.

 

One of TSMC's factories in Taichung's Central Taiwan Science Park. Image used courtesy of Briáxis F. Mendes via Wikimedia Commons

 

MIT first discovered the feasibility of 1nm chip technology—a process that was then optimized by TSMC and NTU’s Department of Electrical Engineering and Optometrics. The MIT researchers found that using semi-metal bismuth as a contract electrode can reduce resistance and increase current, increasing energy efficiency. The joint announcement trumped a previous statement from IBM on its 2nm chip performance.

TSMC is reportedly planning to build a 1nm fab in an industrial park in the Longtan District of Taoyuan. The site is operated by the Hsinchu Science Park (HSP), where TSMC already runs two semiconductor packaging and testing factories. While TMSC hasn’t confirmed or denied the report, it has confirmed that it will continue to invest in advanced chip manufacturing in Taiwan.

While the 1nm chip may not be ready for mass production just yet, when it does arrive, it will lead to further power savings and higher speeds for electric vehicles, artificial intelligence, and other technologies.