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Top EDA Vendors Reveal Plans to Support Intel Foundry

4 days ago by Duane Benson

It's DAC 2024 week, and Intel Foundry, the "world’s first systems foundry for the AI era," is getting a boost from top EDA vendors Ansys, Siemens, Cadence, and Synopsys.

The Design Automation Conference (DAC) 2024 trade show ran this week in San Francisco, and with it, a slew of news emerged from the top three chip electronic design automation (EDA) software providers, Siemens, Cadence, and Synopsys. The three publicly announced their collaborations with Intel, updating their toolsets to support Intel’s 2024/2025 foundry node, Intel 18A.

 

Intel Foundry's Journey to the Top

In the early 2020s, Intel was struggling to deliver industry-leading foundry performance, and there was some question as to whether Intel could remain in the foundry game. But Pat Gelsinger, appointed Intel CEO in 2021, made it his mission to transform the company back into the industry’s leading fab and chip manufacturer. That initiative included foundry expansion, a commitment to remain an integrated device manufacturer (IDM)—both designing and manufacturing chips—and utilizing external fab resources when appropriate.

 

Intel factory employee

Intel factory employee holds a wafer at an Intel fab in Hillsboro, Oregon. Image used courtesy of Intel
 

As part of the expansion of its foundry business, Intel developed the embedded multi-die interconnect bridge (EMIB) architecture. EMIB enables multiple chiplet dies, including 3D integrated circuit (3DIC) designs, to be integrated from different foundry nodes in a single package. Intel pioneered EMIB in its own microprocessor products, such as the GPU Max series and 4th Gen Xeon chips. Now, Intel makes it available to customers of its foundry business.

The process advancements and the latest foundry nodes, such as the 1.8-nm Intel 18A, are useless without accompanying EDA tools, libraries, process flow development, and simulation tools. It’s not as easy as taking an old design and plopping it into a downsized geometry wafer fab. In this roundup, we cover three EDA software industry collaborations with Intel to make EMIB, 3DIC, and other leading-edge Intel technologies more available to chip designers.

 

Siemens' Tool Certifications and EMIB/3DIC Innovation

Siemens Digital Industries Software announced a new EDA certification and a breakthrough with EMIB enablement. The certification ensures that Siemens’ new Solido SPICE, part of Solido Simulation Suite software, can create designs suitable for Intel foundry’s Intel 16 and Intel 18A process nodes, allowing more chip developers to take advantage of 3DIC and Intel’s EMIB technologies. Solido Simulation Suite is used for circuit verification of memory, RF, analog, mixed-signal, library IP, 3DIC, and SoC designs.

 

Siemens tools enable EMIB and 3DIC development

Siemens tools enable EMIB and 3DIC development. Image used courtesy of Siemens
 

In addition to smaller geometries, Intel 18A introduces RibbonFET gate-all-around (GAA) transistor architecture and PowerVia backside power delivery technologies. The Siemens toolset, which supports these new technologies for high-performance computing (HPC) chips, is now certified for Intel’s latest foundry nodes.

Siemens also provides a reference flow, certified by Intel, to guide developers through the process. Existing Siemens tools, Xpedition Substrate Integrator software, Xpedition Package Designer software, Hyperlynx SI/PI software, and Calibre 3DSTACK software, have been boosted with AI acceleration and added to the EMIB and 3DIC portfolio to cover the entire design process.

 

Cadence Enables Systems Foundry for the AI Era

Cadence has reached a number of key milestones in its strategic partnership with Intel Foundry. The company covers advancements in EDA flows, 3DIC implementation, IP libraries, and process design kits (PDK) with multi-node support. The support includes node 18A with EMIB, 2.5D advanced package flow, IP libraries, and custom/analog flows.

Mid-range to high-end artificial intelligence processors require 3DIC and chiplet form to connect multiple specialized co-processors. CPUs, neural processing units (NPUs), graphics processing units (GPUs), and other specialized chips are combined with networking chiplets and 3D memory stacks on high-speed silicon interposers to create powerful AI processor packages. These packages would not be possible without such innovations as EMIB.

 

Cadence integrated 3D IC platform

Cadence integrated 3D IC platform. Image used courtesy of Cadence
 

The Cadence/Intel collaboration enables AI/ML and analog/mixed-signal designs on the latest Intel node 18A foundry. Cadence provides an AI-enabled EMIB reference flow, digital fill flow, custom/analog flow, and a library of design IP for Intel 18A.

 

Synopsys' Production-Ready, Multi-Die Reference Flow

Synopsys has made available a production-ready, multi-die reference flow and its high bandwidth IP through the Synopsys.ai EDA suite. Synopsys designed the multi-die reference flow for developers creating chips that use Intel’s EMIB advanced packaging technology. The reference flow is certified by both Synopsys for use with its EDA tools and Intel for its EMIB foundry process. Chip engineers can use the reference flow, certified by both design and fab, as a solid point of departure for their designs using the latest in chiplet mixed architecture.

The Synopsys EDA toolset uses AI to accelerate the flow design and integrate Synopsys IP with other chip design components. Their 3DIC compiler works with the reference flow to enable 3D and multi-die solutions that will be compatible with Intel’s foundry.

 

Synopsys.ai

Synopsys.ai is an AI-driven EDA suite. Image used courtesy of Synopsys
 

Further, Synopsys has added simulation to verify power, signal, and thermal integrity. Mechanical stress is tested by integrating Ansys' Redhawk-SC Electrothermal, a multiphysics simulation platform for 2.5D and 3D designs. This platform analyzes multi-die chip packages and interconnects for thermo-mechanical stress, thermal profiling, power integrity, signal integrity, and layout parasitic extraction.

 

Designing for the Future

The first node 18A wafers are not yet in production, but with the certified tools available from the big three, designers can create advanced Intel 18A products that are only possible with emerging technologies like EMIB and 3DIC. Intel’s opening of its most advanced processing nodes to non-Intel designs bodes well for the HPC and AL/ML segments, though it remains to be seen if it will be enough to put them on top in the foundry race.