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ST’s Packs MPU-Level Performance in New 600 MHz Bootflash MCUs

March 15, 2024 by Duane Benson

Two new 32-bit Arm Cortex-M7 microcontrollers combine bigger system capabilities with the convenience of a microcontroller.

STMicroelectronics has announced a new family of microcontrollers (MCUs) targeted at embedded applications that require more than simple control but must adhere to the economics of a microcontroller design. Products like personal and home smart devices and industrial appliances increasingly need to deliver not only advanced functionality but also rich user interfaces and strong security.

 

600-MHz, 32-bit Arm Cortex-M7

600-MHz, 32-bit Arm Cortex-M7
 

The new 32-bit Arm Cortex-M7-based STM32H7R and STM32H7S microcontrollers optionally sport an internal graphic processing unit (GPU) optimized for embedded system displays. They are designed with more security features than typically found in MCUs to allow designers to create secure Internet of Things (IoT) devices for today’s threat-heavy world. The STM32H7S varieties come with a hardware cryptographic accelerator for additional security.

The line is divided into the STM32H7R3/S3 general-purpose MCU series and the graphics-enhanced STM32H7R7/S7 series. The two subfamilies are largely code-compatible for operations supported in each MCU's hardware.

 

Giving Designers Greater Flexibility

The new MCUs are built around a 32-bit Arm Cortex-M7 processor core running at 600 MHz. 

The processors can be implemented without external memory, just using the internal 64 KB boot Flash and 620 KB SRAM. However, ST has added the capability to greatly increase memory flexibility beyond what is normally seen in the MCU world. It can store code in internal memory or either serial or parallel external Flash and can execute in built-in SRAM or external SRAM. External memory is routed directly through an internal crypto engine for greater security. The devices specifically support 32-bit parallel external memory interfaces at 100 MHz and 1 to 16-bit serial external memory interfaces up to 200 MHz. 

 

Flexible operations with both internal and external memory

Flexible operations with both internal and external memory
 

ST’s NeoChrome GPU manages full-color displays with 3D-like operations and high-definition interfaces. The on-chip GPU means that running a UI only requires about 10% of the main CPU computational load. The devices also include integrated power management. 

The family has SESIP3 and PSA Level 3 certifications and comes in 64-pin to 240-pin QFN, WLCSP, LQFP, and BGA package options. The MCU-style packaging, with most functionality built-in, accelerates and simplifies the printed circuit board (PCB) design process. The smaller PCB real estate and less complex design can also speed up the time to market and reduce production costs.

 

Blurring the Lines Between MCU and MPU

With these two new offerings, ST deliberately blurs the lines between MCU and MPU. In the press release for the new family, ST asserts that it “punches above its weight by combining the performance, scalability, and security of microprocessor-based (MPU) systems that are typically more complex with the simplicity and integration of microcontrollers (MCUs).”

So, what is the difference between an MCU and an MPU? While the terms are often used interchangeably, MCUs tend to have everything built in; memory, peripherals, and I/O are combined into one chip. Most can even run on an internal clock with nothing external but power and a wire or two (or three) going in or out. An MPU is usually a step up in performance and size and utilizes external memory.

Operating systems are sometimes a good dividing line between MCUs and MPUs as well. MCUs tend to operate in “bare metal” configurations with code stored in internal Flash memory but no operating system, no internal coprocessors, and limited memory management. MPUs can take on a multitasking operating system, such as Linux, and may come with memory management units (MMU) built in and internal coprocessors such as a GPU or digital signal processors (DSP).

 

Block diagram of the STM32H7RS MCU

Block diagram of the STM32H7RS MCU. (See page 11 of presentation to enlarge.)
 

ST has essentially built a chip that has many features that you would find in an MPU system but integrated into a configuration more familiar to MCU designers. It has the coprocessors and advanced capabilities of an MPU in an MCU-like small, highly integrated package.

With chip packages starting with a relatively easy-to-use 68-pin QFN and a powerful set of internal co-processors, the STM32H7R and STM32H7S are designed to deliver high-end MCU-like ease of development and implementation yet offer power and security usually relegated to more complex multi-chip MPU designs. ST promises the first shipments in April 2024.

 


 

All images used courtesy of STMicroelectronics.