RISC-V Chip Combines CPU, GPU, and NPU Into One Core

San Diego-based startup X-Silicon recently announced a novel RISC-V architecture that combines CPU, GPU, and NPU into a single core. The new NanoTile architecture is described as a low-power "C-GPU," aggregating RISC-V Vector CPU capabilities with GPU and AI/ML acceleration in a unique monolithic processor design. 

 

X-Silicon’s single-core concept

 

X-Silicon claims Nanotile is the first open-source architecture of its kind. It provides register-level access through a Hardware Abstraction Layer (HAL), which permits OEMs and content providers to customize their drivers and applications for wide hardware adaptability.

 

Beneath the NanoTile Architecture

The key to this architecture is its multi-core design, where multiple C-GPU cores are arrayed across a chip and linked via an on-chip fast compositor fabric. This setup dynamically aggregates outputs from each core into a common buffer, enhancing data handling for graphics, video processing, and AI tasks. Computational RAM (C-RAM) sits close to the processing cores and unified memory architectures, significantly decreasing latency and boosting overall compute efficiency.

X-Silicon says that its technology can address the limitations faced by existing GPUs. GPUs initially designed for gaming are now struggling with new, diverse workloads like AI and parallel computing. Conventional GPU architectures often suffer from inefficiencies due to fixed-function processing units and underutilization in non-gaming applications.

In contrast, X-Silicon's C-GPU aims to optimize performance for a broader range of applications by employing a scalable, tile-based approach that efficiently renders and manages computing.

 

A RISC-V CPU-GPU Hybrid

An open-source RISC-V CPU-GPU hybrid holds promise in the computing industry.

By integrating CPU and GPU functionalities into a single RISC-V-based processor, NanoTile simplifies the hardware stack and reduces power consumption, making it useful for applications in energy-sensitive environments like mobile devices and embedded systems. The unified architecture also improves performance by minimizing the latency typically associated with communication between separate CPU and GPU chips.

 

X-Silicon’s single-core architecture

 

The RISC-V ISA ensures a high degree of modularity and scalability, allowing users to customize the hybrid processor for specific applications. By making the RISC-V CPU-/GPU hybrid architecture available under an open-source license, X-Silicon facilitates a collaborative environment where developers, engineers, and researchers can contribute to and enhance the processor's design. This openness allows a broader community to experiment with and refine the technology, leading to more rapid advancements and a wider array of applications. As a result, X-Silicon's open-source RISC-V CPU/GPU hybrid can give rise to more personalized and efficient computing solutions.

 

Flexibility Across Industries

With 14 patents backing its novel design, X-Silicon hopes its architecture can transform edge computing by leveraging the massively parallel nature of RISC-V integrated with AI/ML and graphics capabilities. The company plans to offer its new solution to a wide range of industries, including wearable technology, AR/VR headsets, automotive displays, and beyond.

 

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All images used courtesy of X-Silicon.